Date: Mon, 25 Nov 1996 23:59:11 GMT
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<TITLE>Abacus Project Home Page</TITLE>

<H1><!WA0><IMG  SRC="http://www.ai.mit.edu/projects/abacus/abacus.xbm"> Abacus Project Home Page</H1>
<P>
Currently under construction.


<P>
For more information contact <!WA1><A HREF="http://www.ai.mit.edu/people/misha/misha.html"> Mike Bolotski</A> (<KBD>&lt;misha@ai.mit.edu&gt;</KBD>)


<H2>Layout Pictures</H2>
<menu>
  <LI> <!WA2><A HREF="http://www.ai.mit.edu/projects/abacus/PE-m2.gif"> PE layout.</A> </I>
  <LI> <!WA3><A HREF="http://www.ai.mit.edu/projects/abacus/PE-nm2.gif"> PE layout with metal 2 and 3 removed.</A> </I>
  <LI> <!WA4><A HREF="http://www.ai.mit.edu/projects/abacus/abacus-chip-cad.gif"> Chip floorplan (CAD).</A> </I>
</menu>

For die photographs, <!WA5><A HREF="http://www.ai.mit.edu/projects/abacus/layout_pics.html"> click here</A>.


<H2>Other Pictures</H2>
<menu>
  <LI> <!WA6><A HREF="http://www.ai.mit.edu/projects/abacus/abacus_obj.gif"> A real abacus.</A> </I>
</menu>

<P>
<H1>Project Information</H1>

<MENU>
<LI> <!WA7><A NAME=6
HREF="ftp://ftp.ai.mit.edu/pub/users/misha/icpr.ps.gz"> Abacus: A High-Performance Architecture for Vision</A> in the proceedings of the <I>International Conference on Pattern Recognition 94</I>
<LI> <!WA8><A NAME=6
HREF="ftp://ftp.ai.mit.edu/pub/users/misha/arvlsi95.ps.gz"> Abacus: A 1024 Processor 8ns SIMD Array</A> to appear in the proceedings of<EM> Advanced Research in VLSI '95 </EM>
</menu>


<H2>Project Status</H2>

The chips have been manufactured. We are waiting on the fabrication of
custom packages, which we expect in late April of '95.  We hope to
test the packaged chips in mid-May of '95.

<P>
<HR>
<ADDRESS> MIT Abacus Project </ADDRESS>







